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Five typical extra instructions are trap, return from exception, move to and from special registers, and sync [44]. The branch equal zero instruction is Pipelining can be described as a technique in which multiple instructions are overlapped at the time of execution. There are five stages in the pipeline, and Performs the actual computation, generally arithmetic or bitwise operations. The execute stage has at most two inputs (connected to the desired registers in ID) The main common concept of each design is a five-stage execution instruction pipeline. During operation, each pipeline stage works on one instruction at a Typical computer programs contain Integer Instructions which perform operations on integer numbers. For example, such operations may include adding, subtractingA pipelined processor for executing instructions comprising : CC Mask Field Int . C1 . HO3M 7740 U.S. Cl . 395—375 8 Claims INSTRUCTIONS 101 102 KSB odd bit When an application is executing on this 6-stage pipeline, the speedup achieved with respect to non-pipelined execution if 25% of the instructions incur 2 Pipelining is the process of accumulating instruction from the processor through a pipeline. It allows storing and executing instructions in an orderly process